In the field of molecular electronics, few materials show as much promise as carbon nanotubes that comprise hollow cylinders of graphite that have a diameter of a few Angstroms. Nanotubes can be implemented in electronic devices, such as, for example, diodes and transistors, depending on the characteristics of the nanotube. Nanotubes are unique for their size, shape and physical properties. For example, carbon based nanotubes resemble a hexagonal lattice of carbon rolled into a cylinder.
Besides exhibiting intriguing quantum behaviors even at room temperature, nanotubes exhibit at least two important characteristics: a nanotube can be either metallic or semiconducting depending on its chirality, i.e., conformational geometry. Metallic nanotubes can carry an extremely large current density with constant resistivity. Semiconducting nanotubes can be electrically switched “on” or “off” as field effect transistors (FETs). Typically, semiconducting carbon nanotubes are used as the ‘channel’ in FETs. The two types may be covalently joined (i.e., sharing electrons). These characteristics point to nanotubes as excellent materials for making nanometer sized semiconductor circuits.
The most common prior art method of fabricating carbon nanotube FETs starts with depositing nanotubes on an oxide thin film from a liquid suspension. Source and drain contacts are then formed lithographically on the nanotube. The oxide layer is the gate dielectric, and the bulk Si back-gates the device. A schematic of a typical prior art carbon nanotube FET is shown, for example, in FIG. 1.
The deposition of carbon nanotubes on an oxide surface, followed by lithographic patterning of the source and drain contacts, has been successfully used in the prior art for the construction of single carbon nanotube FETs. However, fabrication of integrated circuits from nanotubes requires the precise placement and alignment of large numbers of carbon nanotubes on a surface (e.g., spanning the source and drain contacts). E. Valentin, et al., “High-density selective placement methods for carbon nanotubes”, Microelectronic Engineering, 61-62 (2002), pp. 491-496 disclose a method in which the adhesion of carbon nanotubes onto a SiO2 surface is improved using aminopropyltriethoxysilane (APTS). In this prior art, APTS is employed to form a silanized surface on SiO2 which is then used to selectively place the carbon nanotubes.
As known to those skilled in the art, SiO2 and other oxides of non-metals are acidic oxides which form acids when combined with water. Such oxides are known to have low isoelectric points. The term “isoelectric point” is used throughout the present application to denote the pH at which the net charge on the oxide molecule is zero.
A drawback with the prior art process disclosed in the E. Valentin, et al. article is that the trialkoxysilane undergoes polymerization in solution and self-assembly must be carried out under controlled conditions excluding water. Additionally, APTS cannot be printed using conventional poly(dimethylsiloxane) (PDMS) stamps in contact printing because the solvents that are used for APTS could swell and destroy such stamps.
In view of the above, there is still a need for providing a method in which carbon nanotubes can be selectively placed which avoids the drawbacks with the selective placement process described in the prior art in which APTS is employed.